Low Force Placement Solution for Delicate and Low IO Flip-chip Assemblies

Category: Medical Electronics
Post Date: January 3, 2005
Author(s): Jason Higgins, Universal Instruments Corporation, Binghamton, NY; Robert Hemann, Medtronic Microelectronics Center, Tempe, AZ

Description
Traditionally most flip chips were designed with large bumps on a coarse pitch. However, as the trend towards smaller, more compact assemblies continues the sizes of semiconductor packages are forced to stay in line. New designs are incorporating smaller bump diameters on increasingly aggressive pitches, and in many cases decreasing the total IO count. With fewer and smaller bumps to distribute the load of the placement force it is becoming increasingly vital for equipment manufacturers to meet the challenge in offering low force placement solutions. One such solution will be presented in the following discussion. Also presented will be ways to minimize the initial impact spike that flip chips experience upon placement.

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